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NOIL1SM4000A
Table 8. READOUT TIMING SPECIFICATIONS WITH PRECHARGING OF BUSES
Symbol
a
b
c
d
e
f
g
h
i
Name
Sync_Y
Sync_Y-Clock_Y
Clock_Y-Sync_Y
NoRowSel
Pre_col
Sh_col
Voltage averaging
Sync_X-Clock_X
Prebus pulse
Value
> 20 ns
> 0 ns
> 0 ns
> 50 ns
> 50 ns
200 ns (or cst low, depending on timing mode)
> 20 ns
> 0 ns
As short as possible
Serial Peripheral Interface
The SPI is required to upload different modes. Table 9 shows the parameters and their bit position.
Table 9. SPI PARAMETERS
Parameter
Y-direction
Y-address
X-voltage averaging enable
X-subsampling
X-direction
X-address
Number of output amplifiers
DAC
0
1 to 10
11
12
13
14 to 23
24
25 to 31
Bit #
Remarks
1: From bottom to top
Bit 1 is LSB
1: Enabled
1: Subsampling
0: From left to right
Bit 14 is LSB
0: 1 Output
Bit 25 is LSB
When all zeros are loaded into the SPI, the sensor starts at
pixel 0,0. The scanning is from left to right and from top to
bottom. There is no sub sampling or voltage averaging and
only one output is used. The DAC has the lowest level at its
output. When using sub sampling, only even X-addresses
should be applied.
Load_addr
D
C
To sensor
Q
spi_in
Clock_spi
Bit 31
Load_addr
32 outputs to sensor
E ntire uploadable block
Bit 0
Spi_in
Clock_spi
D
C
Q
Clock_spi
Un ity C ell
spi_in
B0
B1
B2
B31
Load_addr
Figure 22. SPI Block Diagram and Timing
http://onsemi.com
19
command
applied to
sensor
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